Phase-arrayed transceiver
US9473195B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 17, 2015 |
| Grant date | Oct 18, 2016 |
| Priority date | — |
| Expiry date | Jun 17, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/451
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A phased-array transceiver includes: a plurality of antennas; a plurality of transceiving elements respectively coupled to the plurality of antennas; a signal processing block; and a first distributed network, coupled between the signal processing block and the transceiving elements, wherein the transceiving elements, the signal processing block, and the first distributed network are configured as a single chip, and a first transceiving path between one of the plurality of transceiving elements and the signal processing block and a second transceiving path between another of the plurality of transceiving elements and the signal processing block share at least partial signal traces of the first distributed network.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.