Parallel processing for video coding
US9473779B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 4, 2014 |
| Grant date | Oct 18, 2016 |
| Priority date | — |
| Expiry date | Dec 3, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/82
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In one example, a device for coding video data includes a video coder configured to code data indicating whether tile boundaries of different layers of video data are aligned and whether inter-layer prediction is allowed along or across tile boundaries of enhancement layer blocks, code an enhancement layer block in an enhancement layer tile of the video data without using inter-layer prediction from a collocated base layer block for which inter-layer filtering or reference layer filtering across tile boundaries in a reference layer picture in an access unit including both the enhancement layer tile and the base layer block is enabled, and code the collocated base layer block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.