Patent · US Active

Maintaining lock-free, high frequency, high performance counters in software

US9477471B1 · kind B1 · utility

2Cited by
11References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 7, 2015
Grant dateOct 25, 2016
Priority date
Expiry dateJul 7, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/5016
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A first and second thread-local counter is allocated to a first and second thread respectively, where the first thread-local counter is updatable only by or on behalf of the first thread and the second thread-local counter is updatable only by or on behalf of the second thread. The first and second thread-local counter are updated and the updated values are communicated to a central process. The central process updates a single counter in a central database by a value equal to the sum of the updated counter values.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.