Bit-level register file updates in extensible processor architecture
US9477473B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 31, 2012 |
| Grant date | Oct 25, 2016 |
| Priority date | — |
| Expiry date | Dec 22, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30141
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
This document discusses, among other things, systems and methods to receive an instruction to selectively update a value of one or more selected bits of a first register, to receive the one or more selected bits of the first register to be updated and one or more selected bits of the first register to remain unchanged, and to selectively update the value of the one or more selected bits of the first register using a first write port without receiving the value of the one or more selected bits of the first register. In an example, the value of the one or more selected bits of the first register can be updated without receiving the value of the first register, in certain applications, reducing the number of read ports required to update the value of the first register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.