Frame error concealment method and apparatus and error concealment scheme construction method and apparatus
US9478220B2 · kind B2 · utility
3Cited by
20References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 15, 2015 |
| Grant date | Oct 25, 2016 |
| Priority date | — |
| Expiry date | Jun 15, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG10L19/022
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided are a frame error concealment method and apparatus and an error concealment scheme construction method and apparatus. The frame error concealment method includes generating a new signal by synthesizing a plurality of previous signals that are similar to a signal of an error frame and reconstructing the signal of the error frame using the generated signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.