Patent · US Active

Package for a microelectronic die, microelectronic assembly containing same, microelectronic system, and method of reducing die stress in a microelectronic package

US9478476B2 · kind B2 · utility

2Cited by

2References

17Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Debendra Mallik · Chandler, US
Sridhar Narasimhan · Bengaluru, IN
Mathew J. Manusharow · Phoenix, US
Thomas A. Boyd

Key dates

Filing date	Dec 16, 2011
Grant date	Oct 25, 2016
Priority date	—
Expiry date	Oct 18, 2032

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/16251
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A package for a microelectronic die (110) includes a first substrate (120) adjacent to a first surface (112) of the die, a second substrate (130) adjacent to the first substrate, and a heat spreader (140) adjacent to a second surface (111) of the die. The heat spreader makes contact with both the first substrate and the second substrate.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.