Semiconductor package
US9478487B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 5, 2015 |
| Grant date | Oct 25, 2016 |
| Priority date | — |
| Expiry date | Mar 5, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1438
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a substrate including connection pads, a first semiconductor, and conductive wires. The first semiconductor chip is stacked on the substrate and includes bonding pads, non-bonding pads, and a routing area that is provided adjacent a center of an edge of the first semiconductor chip. The conductive wires are connected to the bonding pads and the connection pads. The bonding pads are disposed to form at least one column in a direction extending along the edge of the first semiconductor chip and are not disposed in the routing area. The non-bonding pads are disposed to form a column different from the at least one column formed by the bonding pads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.