Array substrate and manufacturing method thereof, display device, thin film transistor and manufacturing method thereof
US9478562B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 23, 2014 |
| Grant date | Oct 25, 2016 |
| Priority date | — |
| Expiry date | Sep 23, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/1216
Abstract
An array substrate and manufacturing method thereof, a display device, a thin film transistor and manufacturing method thereof are provided. The manufacturing method of an array substrate includes forming an active material layer (501), a gate insulating layer (204) and a metal thin film (502) on a base substrate (201), and forming a pattern including an active layer (203) and a pattern including a gate electrode (205), a source electrode (206), a drain electrode (207), a gate line (1063) and a data line (1061) by a first patterning process; forming a passivation layer (301) on the base substrate (201), and forming a source contact hole (302), a drain contact hole (303), and an bridge-structure contact hole (1062a) by a second patterning process; forming a transparent conductive thin film (1401) on the base substrate (201), and removing the transparent conductive thin film (1404) partially, so that a source contact section (401), a drain contact section (402), a pixel electrode (403), and an bridge structure (1062) are formed. With the manufacturing method, the use number of patterning processes is decreased.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.