Vector signaling codes with high pin-efficiency for chip-to-chip communication and storage
US9479369B1 · kind B1 · utility
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125References
20Claims
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Key dates
| Filing date | Feb 2, 2015 |
| Grant date | Oct 25, 2016 |
| Priority date | — |
| Expiry date | Feb 2, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2025/03789
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An alternative type of vector signaling codes having increased pin-efficiency normal vector signaling codes is described. Receivers for these Permutation Modulation codes of Type II use comparators requiring at most one fixed reference voltage. The resulting systems can allow for a better immunity to ISI-noise than those using conventional multilevel signaling such as PAM-X. These codes are also particularly advantageous for storage and recovery of information in memory, as in a DRAM.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.