Multicore processor system and power control method
US9483101B2 · kind B2 · utility
1Cited by
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7Claims
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Key dates
| Filing date | Jun 12, 2013 |
| Grant date | Nov 1, 2016 |
| Priority date | — |
| Expiry date | Oct 15, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multicore processor system includes multiple processors; a device; a memory that stores information of voltage and clock frequency for minimizing power consumption in connection with a number of the processors accessing to the device; and a power control unit that controls the voltage and the clock frequency of the processors on the basis of the information stored in the memory if the number of the processors accessing to the device changes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.