Hierarchical accelerator registry for optimal performance predictability in network function virtualization
US9483291B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 29, 2015 |
| Grant date | Nov 1, 2016 |
| Priority date | — |
| Expiry date | Jan 29, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2009/45595
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A virtualization platform for Network Functions Virtualization (NFV) is provided. The virtualization platform may include a host processor coupled to an acceleration coprocessor. The acceleration coprocessor may be a reconfigurable integrated circuit to help provide improved flexibility and agility for the NFV. To help improve performance predictability, a hierarchical accelerator registry may be maintained on the coprocessor and/or on local servers. The accelerator registry may assign different classes and speed grades to various types of available resources to help the virtualized network better predict certain task latencies. The accelerator registry may be periodically updated based on changes detected in the local storage and hardware or based on changes detected in remote networks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.