Multi power synthesis in digital circuit design
US9483596B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 8, 2016 |
| Grant date | Nov 1, 2016 |
| Priority date | — |
| Expiry date | Jan 8, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, system and computer program product for forming a netlist for an electronic circuit is disclosed. A Very High Speed Integrated Circuit Hardware Description Language (VHDL) file is created for a plurality of voltage domains. The VHDL file includes a voltage domain attribute and a logic voltage attribute for a pin of the electronic circuit. The voltage domain attribute and the logic voltage attribute for the pin are read from the VHDL file. Netlist instructions for the pin are synthesized to form a netlist for the electronic circuit. Synthesizing the netlist instructions begins with synthesizing netlist instructions within a voltage domain indicated by the voltage domain attribute and ends with synthesizing netlist instructions within a voltage domain indicated by the logic voltage attribute.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.