Method and system for expediting bilinear filtering
US9483843B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 13, 2014 |
| Grant date | Nov 1, 2016 |
| Priority date | — |
| Expiry date | Nov 27, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2207/20024
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present document describes a method and system for expediting bilinear filtering of textures, by reducing the number of data load operations. The method expands the original data layout with additional borders containing replicated texels. The replicated texels correspond either to wrapped-around texels for two-dimensional textures or neighboring faces in cube textures. Therefore, a 2×2 filter kernel for bilinear filtering is built which requires only one texel address to be computed, with all texel data readable with two load operations which are a predetermined stride apart. Different addressing modes are implemented by adjusting the sampling locus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.