Interpolation circuitry and methods
US9484901B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 13, 2015 |
| Grant date | Nov 1, 2016 |
| Priority date | — |
| Expiry date | Jan 14, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/135
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Circuitry for interpolating a value based on a first plurality of samples from within a larger second plurality of samples includes storage for the second plurality of samples, including a plurality of sample memories corresponding in number to the first plurality of samples. Adjacent samples in the sample memories correspond to samples in the second plurality of samples that are separated by other samples numbering one less than that number. A first sample address into a first one of the sample memories is derived by dividing a floor of an index by the number. Respective circuitry for each respective other one of the sample memories derives a respective other sample address from the first sample address based on a remainder of dividing the floor of the index by the number. Shifting circuitry outputs selected samples in a second order under control of a value determined by the remainder.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.