Gate drive circuit
US9484908B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 19, 2015 |
| Grant date | Nov 1, 2016 |
| Priority date | — |
| Expiry date | Jun 19, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/284
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A driver circuit has a gate drive terminal that produces a gate drive signal to control paralleled power semiconductor switches, such as GaN high electron mobility transistor (HEMT) devices. One of the switches is closest to the gate drive terminal such that its gate drive loop inductance is smaller than the remaining switches that are farther away having a larger loop inductance. An additional resistor or gate-source capacitor is provided in the gate drive circuit of the closest switch which increases the total gate resistance of the closest switch compared to the remaining switches, which delays the turn off time of the closest switch. The delay permits zero voltage switching turn-off of the remaining switches to reduce noise. The closest switch is hard switched off but has the smallest loop inductance, which allows optimized turn off.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.