Multi-mode phase-frequency detector for clock and data recovery
US9485082B1 · kind B1 · utility
5Cited by
1References
21Claims
0Family size
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Key dates
| Filing date | Jun 23, 2015 |
| Grant date | Nov 1, 2016 |
| Priority date | — |
| Expiry date | Jun 23, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0337
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A clock and data recovery (CDR) circuit produces an in-phase clock, a quadrature clock offset by 90 degrees from the in-phase clock, and an auxiliary clock offset from the in-phase clock by a fraction of 90 degrees. A data sampler cyclically samples a data signal to form sets of samples according to the in-phase, quadrature, and auxiliary clocks, each set comprising an in-phase sample, a quadrature sample, and an auxiliary sample. A CDR logic circuit processes the samples to form a timing word for each set.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.