Patent · US Active

Sampler load balancing

US9489707B2 · kind B2 · utility

1Cited by

2References

24Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Hema Chand Nalluri · Hyderabad, IN
Joy Chandra · Bengaluru, IN
Prosun Chatterjee · Bengaluru, IN
Benjamin Pletcher · Rancho Cordova, US
Yoav Harel · Folsom, US
Steven J. Spangler · Cameron Park, US

Key dates

Filing date	Sep 27, 2013
Grant date	Nov 8, 2016
Priority date	—
Expiry date	Apr 15, 2034

Classification

Technology area (CPC G)Physics
CPC primaryG06T2200/28
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Embodiments described herein include a graphics processing unit. The graphics processing unit includes a plurality of execution units. The graphics processing unit also includes a plurality of sampler units. Each sampler unit corresponds to a sampler dispatch logic unit and at least one execution unit, and the sampler dispatch logic units are used to network the plurality of sampler units.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.