Semiconductor device and method for manufacturing same
US9490247B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2013 |
| Grant date | Nov 8, 2016 |
| Priority date | — |
| Expiry date | Aug 29, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An IGBT (50) includes a p+ collector region (3) and an n−− drift region (1), in which a first transistor (TR1) and a second transistor (TR2) are formed on the n−− drift region (1). In the n−− drift region (1), a p-type hole extraction region (14) is formed in contact with the second transistor (TR2). When the IGBT (50) is in an on-state, electrons and holes flow through the first transistor (TR1), but a current does not flow through the second transistor (TR2). On the other hand, when the IGBT (50) is switched from the on-state to an off-state, holes flow through the first transistor (TR1), and holes flow through the hole extraction region (14) and the second transistor (TR2).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.