Array substrate and method for producing the same and display apparatus
US9490266B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 16, 2015 |
| Grant date | Nov 8, 2016 |
| Priority date | — |
| Expiry date | Jun 16, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/134372
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
Embodiments of the present invention relate to the display field and provide an array substrate, a method for producing the same and a display apparatus, for reducing a via hole space without adding a step for patterning the gate insulation layer and thereby reducing product costs. The array substrate includes a gate metal layer, a gate insulation layer, a source and drain metal layer and a passivation layer, wherein the array substrate is provided with a via hole, which passes through the passivation layer, the source and drain metal layer and the gate insulation layer and at which a transparent conductive material is deposited for connecting the source and drain metal layer with the gate metal layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.