Motion compensated de-interlacing and noise reduction
US9491473B2 · kind B2 · utility
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16Claims
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Key dates
| Filing date | May 19, 2014 |
| Grant date | Nov 8, 2016 |
| Priority date | — |
| Expiry date | Jul 9, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/80
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A video processing system for de-interlacing a video signal comprises a motion estimation block, a refinement motion estimation block, and a de-interlacer. The motion estimation block generates integer motion vectors for the video signal. The refinement motion estimation block generates fractional motion vectors as a function of the generated integer motion vectors and select frames of the video signal. The de-interlacer generates an output as a function of the generated fractional motion vectors and the selected frames of the video signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.