Method for testing cryptographic circuits, secured cryptographic circuit capable of being tested, and method for wiring such circuit
US9494645B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2009 |
| Grant date | Nov 15, 2016 |
| Priority date | — |
| Expiry date | Aug 17, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/26
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a method for testing cryptography circuits. It also relates to a secure cryptography circuit capable of being tested. The cryptography circuit includes registers and logic gates, and a test thereof performs a differential power analysis on the registers of the circuit. A cryptography circuit being secure and including a first half-circuit associated with a second half-circuit operating in complementary logic, the electric power supply of the first half-circuit is separated from the electric power supply of the second half-circuit, the differential power analysis being carried out in parallel on each half-circuit, the two power supplies being combined into one and the same electric power supply after the test.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.