Error correcting code encoder supporting multiple code rates and throughput speeds for data storage systems
US9495243B2 · kind B2 · utility
9Cited by
111References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2015 |
| Grant date | Nov 15, 2016 |
| Priority date | — |
| Expiry date | Aug 31, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/52
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of ECC encoders supporting multiple code rates and throughput speeds for data storage systems are disclosed. In one embodiment, an encoder can provide for flexible and scalable encoding, particularly when quasi-cyclic low-density parity-check code (QC-LDPC) encoding is used. The encoder can be scaled in size based on, for example, the desired encoding throughput and/or computational cycle duration. The encoder can thus be used to support multiple code rates and throughput speeds. Accordingly, encoding speed and efficiency and system performance is improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.