Removing upstream dead cycles in a data communications bus
US9495320B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2011 |
| Grant date | Nov 15, 2016 |
| Priority date | — |
| Expiry date | Aug 19, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/07
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Dead cycles are removed from an upstream side of a data communications bus. In one example, data symbols are received on clock cycles from lanes of a peripheral device bus having dead cycles. The data symbols are sent upstream on the clock cycles. The start of a packet in the received data symbols is detected and the sending of the data symbols is stalled before sending the start of the packet until additional cycles of data are written into a buffer. Logical idle symbols are sent upstream in place of the data during the stalling. The start of the packet sent after the additional cycles of data are read into the buffer. When a dead cycle is detected during the packet, then a buffered cycle of data is sent upstream during the dead cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.