Systems and methods for improving the performance of a quantum processor by reducing errors
US9495644B2 · kind B2 · utility
52Cited by
14References
23Claims
0Family size
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Key dates
| Filing date | Jul 24, 2014 |
| Grant date | Nov 15, 2016 |
| Priority date | — |
| Expiry date | May 18, 2035 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB82Y10/00
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
Techniques for improving the performance of a quantum processor are described. Some techniques employ improving the processor topology through design and fabrication, reducing intrinsic/control errors, reducing thermally-assisted errors and methods of encoding problems in the quantum processor for error correction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.