Efficient raid technique for reliable SSD
US9496051B2 · kind B2 · utility
0Cited by
4References
17Claims
0Family size
Assignee
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Key dates
| Filing date | Feb 8, 2013 |
| Grant date | Nov 15, 2016 |
| Priority date | — |
| Expiry date | Aug 2, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7208
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided is a control device for managing a plurality of memory channels driven through multichannel interleaving. The apparatus includes a stripe configuring unit for configuring a stripe according to a physical number of pages included in the plurality of memory channels, and a parity generating unit for generating parity data on the configured stripe.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.