Method and apparatus for polar receiver with digital demodulation
US9497055B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 2015 |
| Grant date | Nov 15, 2016 |
| Priority date | — |
| Expiry date | Feb 27, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/18
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Circuitry and methods are described for digital signal demodulation. In a polar receiver, a modulated radio-frequency input signal is provided to frequency division circuitry, which may include a harmonic injection-locked oscillator (ILO). The phase of the frequency-divided output is measured using a self-triggered time-to-digital converter (TDC), which may be a Vernier TDC. A subtractor subtracts a period offset from the output of the TDC to generate an offset digital time output, and a digital integrator integrates the offset digital time output. The integrated time signal represents the phase of the radio-frequency input signal and can be used to determine a symbol, such as a phase-shift keying (PSK) or quadrature amplitude modulation (QAM) symbol, conveyed by the modulated radio-frequency input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.