Shift register, method for driving the same, and array substrate
US9502134B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 30, 2013 |
| Grant date | Nov 22, 2016 |
| Priority date | — |
| Expiry date | May 6, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0286
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The disclosure relates to a shift register, a method for driving the same, an array substrate and a display apparatus, for reducing the wiring space as required by the shift register. The shift register comprising a control unit and a plurality of output sub-units, wherein the control unit comprises a plurality of output terminals which output gate line control signals sequentially according to the control timing sequence during a first preset time period, and output the gate line control signals sequentially according to the control timing sequence during a second preset time period in an order opposite to or identical to an order in which the gate line control signals are output during the first preset time period; each of the output sub-units is connected to a corresponding output terminal of the control unit, and divides the gate line control signal output from the connected output terminal into at least a first gate line control signal and a second gate line control signal, and outputs the first gate line control signal and the second gate line control signal respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.