Patent · US Active

Power gating for termination power supplies

US9507408B2 · kind B2 · utility

0Cited by

0References

21Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Xiuting C. Man · Beaverton, US
Christopher P. Mozak · Beaverton, US
Shaun M. Conrad · Cornelius, US
Jeffery L. Krieger · Portland, US
Philip R. Lehwalder · Hillsboro, US
Inder M. Sodhi · Palo Alto, US

Key dates

Filing date	Sep 27, 2012
Grant date	Nov 29, 2016
Priority date	—
Expiry date	May 2, 2034

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D30/50
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Power gating control architectures. A memory device having at least a memory array and input/output (I/O) lines terminated on the memory device with termination circuitry coupled to receive a termination supply voltage (Vtt) with power gating circuitry to selectively gate the termination supply voltage in response to a power gating control signal (VttControl) is coupled with a processing core coupled with the memory device, the processing core to selectively assert and deassert the VttControl signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.