Semiconductor wafer and method for manufacturing semiconductor device
US9508559B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 18, 2013 |
| Grant date | Nov 29, 2016 |
| Priority date | — |
| Expiry date | Sep 18, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/05556
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor wafer including patterns transferred to a plurality of shot regions of the semiconductor wafer respectively, a plurality of chip regions being formed in the plurality of shot regions respectively, a plurality of first dummy patterns being formed respectively in a first chip region of the plurality of chip regions of each of the plurality of shot regions, the plurality of first dummy patterns being arranged repeatedly in a first manner, a plurality of second dummy patterns being formed respectively in a second chip region of the plurality of chip regions of each of the plurality of shot regions, the plurality of second dummy patterns being arranged repeatedly in a second manner different from the first manner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.