Semiconductor device and method of fabricating the same
US9508726B2 · kind B2 · utility
6Cited by
8References
5Claims
0Family size
Assignee
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Key dates
| Filing date | Jul 20, 2015 |
| Grant date | Nov 29, 2016 |
| Priority date | — |
| Expiry date | Jul 20, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a device isolation pattern on a substrate to define active patterns, a gate electrode crossing the active patterns, first and second impurity regions in each of the active patterns and on both sides of the gate electrode, a bit line crossing the gate electrode, a first contact electrically connecting the first impurity region to the bit line, and a second contact electrically connected to the second impurity region. The second contact includes a vertically-extended portion covering an upper side surface of the second impurity region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.