Manufacturing method of thin film transistor and manufacturing method of array substrate
US9508808B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 18, 2014 |
| Grant date | Nov 29, 2016 |
| Priority date | — |
| Expiry date | Jun 18, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/0231
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A thin film transistor and manufacturing method thereof, an array substrate comprising the thin film transistor and manufacturing method thereof are provided. The method of manufacturing the thin film transistor comprises forming an active layer and a source-drain electrode layer, forming a photoresist layer on the source-drain electrode layer and forming a pattern of the photoresist layer by a pattern process; etching the source-drain electrode layer by using the pattern of the photoresist layer as a mask to form a pattern of the source-drain electrode layer including a source electrode and a drain electrode; and removing the photoresist, then etching the active layer by using the pattern of the source-drain electrode layer as a mask to form a pattern of the active layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.