Reference counting for memory areas
US9513812B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 12, 2015 |
| Grant date | Dec 6, 2016 |
| Priority date | — |
| Expiry date | Nov 12, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/702
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Technique for analyzing memory areas based on local copies of a global counter by: (i) determining a plurality of currently-executing fast threads and a plurality of currently executed slow threads; (ii) intermittently incrementing a global counter variable to have a current global counter value; (iii) intermittently setting the local counter of the data set for each fast thread of the plurality of fast threads to be equal to the current global counter value; (iv) determining that no slow threads of the plurality of slow threads reference the first memory region; (v) assigning a free-after value to the first memory region; (vi) determining whether the free-after value of the first memory region is less than or equal to all of the local counters of the fast thread data sets of the plurality of fast threads; and (vii) de-allocating the first memory region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.