Gate driver on array circuit and liquid crystal display device
US9514695B2 · kind B2 · utility
1Cited by
4References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 5, 2014 |
| Grant date | Dec 6, 2016 |
| Priority date | — |
| Expiry date | May 7, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate driver on array circuit and a liquid crystal display device are disclosed. The Nth-level GOA unit comprises: a pull-down unit; the pull-down unit comprises a first thin film transistor (TFT) which is connected to the input end of the (n+2)th-level high-frequency clock signal and a pull-down control unit respectively; the first TFT, a pull-up unit and a pull-up control unit are commonly connected to the pull-down point so as to pull-down the electrical potential of the pull-down point, wherein N is a positive integer greater than 3; n is positive integer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.