Reducing speech recognition latency
US9514747B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2013 |
| Grant date | Dec 6, 2016 |
| Priority date | — |
| Expiry date | Mar 1, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG10L2015/085
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an automatic speech recognition (ASR) processing system, ASR processing may be configured to reduce a latency of returning speech results to a user. The latency may be determined by comparing a time stamp of an utterance in process to a current time. Latency may also be estimated based on an endpoint of the utterance or other considerations such as how difficult the utterance may be to process. To improve latency the ASR system may be configured to adjust various processing parameters, such as graph pruning factors, path weights, ASR models, etc. Latency checks and corrections may occur dynamically for a particular utterance while it is being processed, thus allowing the ASR system to adjust to rapidly changing latency conditions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.