System and method for reducing reactive current on a common DC bus with multiple inverters
US9515484B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2013 |
| Grant date | Dec 6, 2016 |
| Priority date | — |
| Expiry date | Jan 12, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M1/008
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A system configured to reduce the amplitude of reactive current present on a DC bus shared by multiple inverters is disclosed. The start of the switching period for the modulation routines of each inverter is synchronized, and a carrier phase angle is determined for a carrier signal within each of the inverters. The modulation routine of each inverter generates a reactive current on the shared DC bus. By controlling the carrier phase angle for each inverter, the reactive current of a first inverter may be generated at a phase angle that is offset from the phase angle of the reactive current generated by a second inverter. As a result, the reactive current from the first inverter cancels at least a portion of the reactive current from the second inverter, reducing the total reactive current present on the DC bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.