High-speed pseudo-dual-port memory with separate precharge controls
US9520165B1 · kind B1 · utility
4Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 19, 2015 |
| Grant date | Dec 13, 2016 |
| Priority date | — |
| Expiry date | Jun 19, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A pseudo-dual-port (PDP) memory such as a PDP SRAM is provided that independently controls the bit line precharging and the sense amplifier precharging to increase memory operating speed while eliminating or reducing the discharge of crowbar current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.