Provision of etch stop for wordlines in a memory device
US9520402B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 25, 2015 |
| Grant date | Dec 13, 2016 |
| Priority date | — |
| Expiry date | Aug 25, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/27
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present disclosure are directed towards techniques to provide etch stops to the wordlines that form a staircase structure of a 3D memory array. In one embodiment, the apparatus may comprise a 3D memory array having wordlines disposed in a staircase structure. A wordline may include a silicide layer and a spacer disposed to abut the silicide layer around an end of the wordline. The silicide layer and the spacer may form an etch stop of the wordline for a wordline contact structure to electrically connect the wordline with the memory array in response to a deposition of the wordline contact structure on the etch stop. The etch stop may be configured to prevent a physical or electrical contact of the wordline contact structure with an adjacent wordline of the staircase structure, in order to avoid undesired short circuits. Other embodiments may be described and/or claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.