Apparatus and method for high linearity tuning
US9520904B2 · kind B2 · utility
2Cited by
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18Claims
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Key dates
| Filing date | Nov 13, 2013 |
| Grant date | Dec 13, 2016 |
| Priority date | — |
| Expiry date | Dec 22, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/406
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A system that incorporates teachings of the subject disclosure may include, for example, a plurality of variable capacitors, a first set of resistors for applying a bias voltage to each variable capacitor of the plurality of capacitors, and a second set of resistors for providing a DC ground to each variable capacitor of the plurality of capacitors. The system can include one or more of multiple bias points, anti-parallel diodes, a choke inductor or a ground inductor. Other embodiments are disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.