Multiple photosites pixel architecture
US9521304B2 · kind B2 · utility
2Cited by
21References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2015 |
| Grant date | Dec 13, 2016 |
| Priority date | — |
| Expiry date | Aug 28, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/807
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An image sensor pixel may include an array of four photosites, a transverse isolator wall separating the array in two rows of two photosites, and a longitudinal isolator wall separating the array in two columns of two photosites. Both ends of the longitudinal wall may be set back relative to the edges of the array. First and second conversion nodes may be arranged in the spaces between the longitudinal wall and the edges of the matrix. Each conversion node may be common to two adjacent photosites, and an independent transfer gate may be between each photosite and the corresponding conversion node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.