Method for producing a microelectronic device
US9521794B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 28, 2014 |
| Grant date | Dec 13, 2016 |
| Priority date | — |
| Expiry date | Sep 14, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/00
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method for producing a microelectronic device including a substrate and a stack having at least one electrically conductive layer and at least one dielectric layer. The method includes formation, from one face of the substrate, of at least one pattern that is in depression with respect to a plane of the face of the substrate, the wall of the pattern having a bottom part and a flank part, the flank part being situated between the bottom part and the face of the substrate, the flank part having at least one inclined wall as far as the face of the substrate. With formation of the stack, the layers of the stack helping at least partially fill in the pattern. The stack is thinned of the stack at least as far as the plane of the face of the substrate so as to completely expose the edge of said at least one electrically conductive layer flush in one plane, and at least one electrical connection member is formed on the substrate in contact with the edge of the at least one electrically conductive layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.