Resetting memory locks in a transactional memory system
US9524246B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 10, 2014 |
| Grant date | Dec 20, 2016 |
| Priority date | — |
| Expiry date | Feb 7, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1052
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and computer program product for resetting of memory locks in a transactional memory system. The system includes a processor setting at least one new memory lock during execution of a transaction that acquires access to a region of memory. The new memory lock indicates that the transaction and its associated thread have exclusive temporary access to the memory region. The system further includes the processor determining if a first in first out (FIFO) memory lock register is full of memory locks and, in response to the FIFO memory lock register being full, a memory lock is removed from a tail position of the FIFO memory lock register. The removed memory lock is reset to return to a transactional memory state and the new memory lock is added to a head position in the FIFO memory lock register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.