Array substrate, manufacturing method thereof, liquid crystal panel and liquid crystal display
US9524988B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 9, 2012 |
| Grant date | Dec 20, 2016 |
| Priority date | — |
| Expiry date | Feb 11, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/40
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate, a manufacturing method thereof, a liquid crystal panel and a liquid crystal display. An array substrate, comprises: a substrate (11), gate lines (2), data lines (4) and common electrode lines (3) disposed on said substrate (11), said gate lines (2) and said data lines (4) define a plurality of pixel units (20, 21); two transparent conductive film layers (12, 19) and thin film transistor are formed in each of said pixel units (20, 21); wherein, said pixel units (20, 21) comprise a first pixel unit (20) and a second pixel unit (21), and the first pixel unit (20) and the second pixel unit (21) are alternately arranged along the direction of said data lines (4); wherein, in said first pixel unit (20), a first transparent conductive film layer (12) is electrically connected with a common electrode line (3), a second transparent conductive film layer (19) is electrically connected with a drain electrode (16) of a thin film transistor; in said second pixel unit (21), a first transparent conductive film layer (12) is electrically connected with a drain electrode (16) of a thin film transistor, a second transparent conductive film layer (19) is electrically connected wit…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.