Thin-film pattern array and production method therefor
US9530668B2 · kind B2 · utility
1Cited by
2References
12Claims
0Family size
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Key dates
| Filing date | Aug 30, 2013 |
| Grant date | Dec 27, 2016 |
| Priority date | — |
| Expiry date | Aug 30, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed are: a thin-film pattern array able to minimize level differences between thin films; and a production method therefor. The thin-film pattern array comprises: a lower thin-film pattern which is positioned on a substrate; an upper thin-film pattern which is positioned on the upper edge of the lower thin-film pattern; and a level-difference attenuating pattern which is positioned between the lower thin-film pattern and the upper thin-film pattern, and has a gentle taper angle so as to be able to reduce the level difference between the lower thin-film pattern and the upper thin-film pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.