Patent · US Active

Array substrate, display panel and method for preparing array substrate

US9530800B2 · kind B2 · utility

11Cited by
0References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 21, 2015
Grant dateDec 27, 2016
Priority date
Expiry dateApr 1, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D86/451

Abstract

The invention provides an array substrate, a display panel and a method for preparing an array substrate. The array substrate includes multiple low temperature poly-silicon (LTPS) thin film transistors arranged in an array. Each LTPS thin film transistor includes: a substrate; a LTPS layer, a source, a drain and a first conductive layer disposed on a same surface of the substrate, the source and the drain respectively being arranged at two sides of the LTPS layer and electrically connected with the LTPS layer, the drain being electrically connected with the first conductive layer; an insulating layer disposed on the LTPS layer, the source, the drain and the first conductive layer; a gate disposed on the insulating layer and corresponding to the LTPS layer; a passivation layer disposed on the gate; and a second conductive layer disposed on the passivation layer and corresponding to the first conductive layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.