Display panel
US9530825B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 15, 2013 |
| Grant date | Dec 27, 2016 |
| Priority date | — |
| Expiry date | Mar 5, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/148
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display panel which can avoid RC delay is provided. The display panel comprises photosensitive transistors, data lines electrically connected with source electrodes of the photosensitive transistors, first electrodes electrically connected with drain electrodes of the photosensitive transistors, and light emitting diodes, wherein the photosensitive transistors are arranged in rows the direction of which is perpendicular to the extension direction of the data lines, and the light emitting diodes are arranged in rows, each row of light emitting diodes are arranged along the direction perpendicular to the extension direction of the data lines, and are used for simultaneously turning on all of the photosensitive transistors in a corresponding row.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.