Nitride semiconductor substrate
US9530846B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2016 |
| Grant date | Dec 27, 2016 |
| Priority date | — |
| Expiry date | Mar 29, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/475
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A solution is formation of a nitride semiconductor layer on one principal plane of a single crystal substrate through a first layer. Upon selecting arbitrary three places in a radial direction from a cross section cleaved in a diameter portion and observing an interface between the first layer and the nitride semiconductor layer by taking a width of at least 500 nm in the radial direction, a value is within the range of 6 nm or more and 15 nm or less in a mean value of the three places with regard to a difference between a maximum height of a convex top portion and a minimum height of a concave bottom portion of the first layer in a thickness direction from the single crystal substrate toward the nitride semiconductor layer. A value is 10 nm or more and 25 nm or less in the mean value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.