Semiconductor device and manufacturing method of same
US9530859B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 21, 2013 |
| Grant date | Dec 27, 2016 |
| Priority date | — |
| Expiry date | Nov 21, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/60
Abstract
A manufacturing method for a semiconductor device including a drift layer; a body layer contacting a front surface of the drift layer; an emitter layer provided on a portion of a front surface of the body layer and exposed on the front surface of the substrate; a buffer layer contacting a back surface of the drift layer; a collector layer contacting a back surface of the buffer layer and exposed on a back surface of the substrate; and a gate electrode facing, via an insulator, the body layer in an area where the body layer separates the emitter layer from the drift layer, includes preparing a wafer that includes a first layer, and a second layer layered on a back surface of the first layer and having a higher polycrystalline silicon concentration than the first layer, and forming the buffer layer by implanting and diffusing ions in the second layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.