Method of fabricating semiconductor devices
US9530930B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2013 |
| Grant date | Dec 27, 2016 |
| Priority date | — |
| Expiry date | Dec 19, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/0364
Abstract
Vertical high power LEDs are the technological choice for the application of general lighting due to their advantages of high efficiency and capability of handling high power. However, the technologies of vertical LED fabrication reported so far involve the wafer-level metal substrate substitution which may cause large stress due to the mismatch between metal substrate and LED layer. Moreover, the metal substrate has to be diced to separate LED dies which may cause metal contamination and thus increase the leakage current. These factors will lower the yield of LED production and increase the cost as well. The present invention is to disclose a novel method for the fabrication of GaN vertical high power LEDs and/or a novel method for the fabrication of GaN vertical high power LEDs which is compatible to mass production conditions. The novelty of the invention is that the island metal plating is conducted with the help of pattern formation techniques. Due to the small area of the islands, the stress generated between LED layer and metal islands is much less significant. Furthermore, due to the island metal plating and through the application of temporary supporting carriers the LED d…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.