Frequency synthesizer system and method
US9531324B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 2015 |
| Grant date | Dec 27, 2016 |
| Priority date | — |
| Expiry date | Jul 1, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/013
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A frequency synthesizing circuit comprising a first mixer configured to receive a first input signal at a first input thereof, a first filter configured to receive an output signal of the first mixer and remove undesired signal frequencies from the output signal of the first mixer, and a feedback loop. The feedback loop includes a second mixer having a first input connected to the output of the first filter and a second input for receiving a second input signal. The second mixer is configured to mix a signal received at the first input with the second input signal. The feedback loop further includes a third mixer having a first input connected to an output of the second mixer and a second input for receiving a third input signal. The third mixer is configured to mix a signal received at the first input with the third input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.