Processor, multiprocessor system, compiler, software system, memory control system, and computer system
US9535699B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 5, 2014 |
| Grant date | Jan 3, 2017 |
| Priority date | — |
| Expiry date | Apr 7, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3885
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor includes: a first instruction processing unit that, in a first mode, receives a first input including instructions included in a first instruction set; a second instruction processing unit that, in a second mode, receives the first input, the second instruction processing unit having a simpler configuration than the first instruction processing unit; a third instruction processing unit that, in a third mode, receives a second input including instructions included in a second instruction set, the second instruction set including part of the instructions included in the first instruction set, the third instruction processing unit having a simpler configuration than the first instruction processing unit and the second instruction processing unit; a selection unit that selects, according to a mode, a result of decoding by one of the instruction processing units; and an instruction execution unit that executes an instruction according to the selected result of decoding.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.